The Process Control Block and Context Switching | Operating Systems

PCB contents in detail

The PCB is the kernel’s representation of a process. On Linux, it is the task_struct — one of the largest kernel structures. The key fields relevant to the Tripos:

Processor state area

General-purpose registers: rax, rbx, rcx, …, r15 (x86-64). Must be saved so the process can resume mid-computation.
Program counter (rip on x86-64): address of the next instruction.
Stack pointer (rsp): top of the user-mode stack.
Frame pointer (rbp): base of the current stack frame.
Flags register (rflags): condition codes, interrupt-enable bit, mode bit.
Floating-point / SIMD state: SSE/AVX registers are large and expensive to save; the kernel often saves them lazily (only on first use by the new process).

Memory management

Page table base (CR3 register value): the root of the process’s page-table tree. Reloading CR3 flushes all TLB entries not tagged with a process ID (on hardware that supports PCIDs, the flush is partial).
Memory map (mm_struct): describes all mapped regions (text, data, heap, stack, mmap files) with their virtual addresses and permissions.

File and I/O state

File descriptor table: an array indexed by the small integers returned from open(). Each entry points to a kernel file object.
Current working directory: the cwd entry in the file descriptor table.

Scheduling and accounting

Policy and priority: which scheduling class (CFS, real-time, idle), static priority, and nice value.
Runtime statistics: accumulated virtual runtime (vruntime), recent CPU utilisation (decayed exponentially).
Timers: the sum of time spent in user mode and in kernel mode, tracked for profiling and for the alarm system call.

Context-switch steps

A full context switch from Process A to Process B:

Trap/interrupt: CPU enters kernel mode. The hardware saves the user-mode rip, rsp, and rflags onto the kernel stack.
Save A’s state: The kernel’s trap-entry assembly saves the remaining user-visible registers (general-purpose, segment registers) onto the kernel stack, then saves the kernel stack pointer into A’s task_struct.
Scheduler: Calls pick_next_task(), which selects B (based on CFS vruntime, priority, etc.).
Switch address space: Loads B’s page table by writing the physical address of B’s top-level page table into CR3. (On hardware with PCID, the TLB flush is selective.)
Restore B’s state: Loads B’s kernel stack pointer from B’s task_struct, pops the saved registers from B’s kernel stack, and returns to user mode — which restores rip, rsp, and rflags atomically.
B resumes: The CPU is now executing B at whatever instruction was next in B’s saved rip.

Cost factors

Factor	Impact
Register save/restore	Tens to low hundreds of cycles. The general-purpose registers are ~16 × 8 bytes = 128 bytes — negligible.
TLB flush	On CR3 reload without PCIDs, all TLB entries are invalidated. Subsequent memory accesses must walk page tables, which is expensive (hundreds to thousands of cycles per miss).
Cache pollution	The new process’s code and data displace the old process’s cache lines. The working set must be reloaded from memory.
Pipeline flush	The control-transfer instructions (trap, return, indirect jump) mispredict and flush the pipeline.

Millisecond-scale context switches would be catastrophic. Realistic figures are 1–10 µs, but the dominant cost is usually the post-switch cache and TLB warming, not the switch itself.

Summary

The PCB stores all processor state, memory mappings, file descriptors, and scheduling parameters.
Context switching saves A’s state, selects B, switches address spaces, and restores B’s state.
The big costs are TLB flushes and cache displacement, not register save/restore.