Worked example 1: single-level paging (32-bit)
A system has 32-bit logical addresses, 4 KB pages, and 4-byte PTEs. A process uses only addresses 0x0000_0000–0x0040_0000 (the first 4 MB of its address space). Compute the page-table size with single-level and two-level paging.
Single-level:
- Page size: 212 = 4096 bytes.
- Number of pages: 232/212=220=1,048,576.
- Page table size: 220×4=4 MB — larger than the process itself! The page table uses 4 MB even though the process only uses 4 MB of data.
Two-level (10/10/12 split):
- Inner page tables: each maps 210=1024 pages (4 KB each = 4 MB of address space).
- To cover 4 MB: need 1 inner page table (1024 pages × 4 KB = 4 MB).
- Outer page table: 1 entry pointing to the inner table.
- Outer-table size: 210 entries = 210×4=4 KB.
- Inner-table size: 4 KB.
- Total page-table size: 8 KB. Versus 4 MB for single-level. The saving is a factor of 512.
Worked example 2: EAT calculation (2023 Paper 2 Q3)
System with memory access time 80 ns, page-fault service time 8 ms (assuming a free frame is available). Target maximum EAT: 100 ns.
(i) Maximum page-fault rate:
EAT=(1−p)×80+p×8,000,000≤100
80+7,999,920⋅p≤100
p≤7,999,92020=399,9961
So at most one page fault per 400,000 accesses — about 0.00025%.
(ii) Double the maximum fault rate:
p=199,9981
EAT=(1−199,9981)×80+199,9981×8,000,000
=199,998199,997×80+8,000,000=199,99823,999,760≈120 ns
(iii) Half of page faults occur when no free frames are available:
When no free frame is available, a frame must be evicted and written back (dirty). The page-fault service time approximately doubles to 8+8=16 ms (well — if half the faults need a swap-out, the effective service time is 0.5×8+0.5×16=12 ms):
EAT=(1−199,9981)×80+199,9981×12,000,000
=199,998199,997×80+12,000,000=199,99827,999,760≈140 ns
Worked example 3: TLB + EAT (2025 Paper 2 Q4)
Tmem=40 ns, Ttlb=5 ns, α=0.99, 5-level page table (k=5).
EAT=0.99×(5+40)+0.01×(5+5×40+40)
=0.99×45+0.01×245
=44.55+2.45=47.0 ns
The answer is 47 ns. Common mistakes: forgetting the TLB lookup time on a miss, or miscounting the number of memory accesses (remember: k PTEs + the final data access = k+1).
| Quantity | Formula |
|---|
| Page offset bits | log2(page size) |
| Page number bits | Address bits − offset bits |
| PTEs per page-table page | Page size ÷ PTE size |
| Single-level PT size | 2page number bits×PTE size |
| EAT (paging only) | (1−p)×Tmem+p×Tpage-fault |
| EAT (TLB) | α(Ttlb+Tmem)+(1−α)(Ttlb+k⋅Tmem+Tmem) |
Summary
- Multi-level page tables reduce overhead from “all pages” to “actually used pages”.
- EAT calculations are mechanical: plug the numbers into the formula and be careful with units (ms vs ns).
- Always show your working — the mark scheme awards partial marks for correct steps even if the final arithmetic is wrong.