De Morgan's Theorem
Statement of the Theorem
De Morgan’s theorem describes how to distribute a complement (NOT) over an AND or OR operation:
In words:
- The complement of a product equals the sum of the complements: .
- The complement of a sum equals the product of the complements: .
For the general form with variables:
Truth Table Verification
For two variables, both forms can be verified exhaustively:
| a | b | ||||
|---|---|---|---|---|---|
| 0 | 0 | 1 | 1 | 1 | 1 |
| 0 | 1 | 1 | 1 | 0 | 0 |
| 1 | 0 | 1 | 1 | 0 | 0 |
| 1 | 1 | 0 | 0 | 0 | 0 |
The columns for and are identical, confirming the first form. The columns for and are identical, confirming the second form.
Inductive Extension to More Variables
The theorem extends to any number of variables by induction. For three variables:
The key step applies the two-variable form treating as a single variable combined with .
Similarly for the AND form:
Practical Rule for Application
To apply De Morgan’s theorem to a Boolean expression:
- Change all ANDs to ORs (and vice versa).
- Complement each individual variable (put a bar over every literal).
- Complement the entire expression (put a bar over the whole thing).
Example: Apply De Morgan to .
Step 1: change OR to AND, AND to OR: Step 2: complement each variable: Step 3: complement the whole:
So . We can then simplify the right-hand side further by applying De Morgan again:
Which returns us to the original, confirming correctness.
More usefully, De Morgan can simplify: .
Worked Algebraic Example
Simplify .
Step 1: Apply De Morgan to the whole expression (impossible directly because it’s a sum of three terms). Instead, simplify inside first.
Inside:
Simplify each term algebraically before applying De Morgan:
Apply De Morgan: .
Note , so the third term vanishes:
Factor :
Using the distributive law (proved in the Boolean Algebra note):
Bubble Logic: Gate Equivalences
De Morgan’s theorem has an elegant interpretation in terms of gate symbols. The “bubble” on a gate input or output represents complementation.
Rule 1: Two Bubbles Cancel
Two bubbles in series (an input bubble feeding into an output bubble along the same wire) cancel and have no logical effect:
Rule 2: AND with Inverted Inputs = NOR
An AND gate with bubbles on all inputs:
So an AND gate with inverted inputs is functionally a NOR gate (and equivalently, a NOR gate with inverted inputs is an AND gate).
Rule 3: OR with Inverted Inputs = NAND
An OR gate with bubbles on all inputs:
So an OR gate with inverted inputs is functionally a NAND gate.
Rule 4: Bubble Through a Gate
Moving a bubble from output to inputs changes the gate type:
- NAND: AND gate followed by bubble → bubble input OR gate:
- NOR: OR gate followed by bubble → bubble input AND gate:
Example 1: Implementing Using Only NAND Gates
The expression is in SOP form: two AND terms OR-ed together.
Direct implementation uses two AND gates and one OR gate.
NAND-only implementation: Apply De Morgan by double-complementing:
The outer complement tells us to use a NAND gate. Its inputs are and , each of which is the output of a NAND gate. So the circuit is: three NAND gates. Two NAND gates feed into a third NAND gate.
Gate 1: NAND of and produces . Gate 2: NAND of and produces . Gate 3: NAND of the two intermediate signals produces .
Example 2: Implementing Using Only NOR Gates
The expression is in POS form: two OR terms AND-ed together.
NOR-only implementation: Double-complement and apply De Morgan:
Now the outer complement is a NOR gate. Its inputs are and , each produced by a NOR gate. So three NOR gates in total.
Gate 1: NOR of and produces . Gate 2: NOR of and produces . Gate 3: NOR of the two intermediate signals produces .
Summary of Gate Transformations
| Original gate | With bubbles on inputs | Equivalent gate |
|---|---|---|
| AND | Bubbles on both inputs | NOR |
| OR | Bubbles on both inputs | NAND |
| NAND | Bubbles on both inputs | OR |
| NOR | Bubbles on both inputs | AND |
These transformations are the foundation of bubble pushing: a technique for converting a circuit from one gate type to another while preserving the logic function. They are essential when a designer must implement a circuit using only one type of gate (e.g., NAND-only or NOR-only designs, which are common in CMOS).